Large area amorphous silicon layers are widely used to make the transistors used for flat panel display devices. Indeed the most widely used flat panel display, i.e., the active matrix liquid crystal display (AMLCD), derives its name from an active matrix of transistors that are arranged in both the X and Y directions. A transistor made from amorphous silicon is placed at each picture element (pixel) in each color for a color display (red, green, and blue).
Transistors made from amorphous silicon exhibit low performance characteristics (compared to those made from single crystal silicon), with low carrier mobility being a determining property. Researchers have recognized that converting amorphous silicon to poly crystalline silicon (poly Si) will enhance performance considerably, even to a significant fraction of the performance of single crystal silicon, the material from which all integrated circuits are made.
Studies of poly-Si thin film transistors have concentrated on methods for reducing their fabrication costs, either by reducing the transistors'processing time or by lowering the processing temperatures. The latter effect is important since it allows the usage of less expensive substrates for the transistor arrays, e.g., glass, plastic, etc . . . For instance, Czubatyj et al. in "Low-Temperature Polycrystalline TFT on 7057 Glass ", IEEE Electron Device Letters, Vol. 10, pages 349-351, 1989, demonstrates that polysilicon thin film transistors can be fabricated on 7059 glass substrates using relatively low temperature furnace annealing for crystallization. However, the crystallization process takes longer than 75 hours and is therefore not practically applicable.
Poly-Si films can be deposited, deposited and recrystallized, or deposited in the amorphous (.alpha.-Si) form and then crystallized into poly-Si films. There are three principal crystallization processes: furnace annealing, rapid thermal process (RTP) and laser annealing. The first two are solid phase crystallization techniques, while the third is a liquid phase technique. Although reported laser annealing techniques have the potential for effecting low temperature crystallization, laser crystallization suffers from the need to raster the laser beam; raising throughput issues. Laser annealing also exhibits other difficulties, e.g. reproducibility, uniformity and peel-off. The most commonly used methods for producing large grain poly-Si films are furnace annealing of .alpha.-Si films at temperatures &gt;=600.degree. C., with very long processing times (16-30 hours or longer for .alpha.-Si films) or the RTP approach (e.g. 700.degree. C./5 mins)
An inventor hereof in "Low Thermal Budget PolySilicon Thin Film Transistors on Glass", Japanese Journal of Applied Physics, Vol. 30, pages L269-L271, 1991 has demonstrated that thin film transistors can be fabricated on poly-Si films made by the crystallization of precursor .alpha.-Si films. Those polycrystalline films were obtained by a rapid thermal annealing of the precursor films for five minutes at 700.degree. C. on 7059 glass substrates.
In U.S. Pat. No. 5,147,826 to Liu et al., it is shown that a prior art thermal anneal procedure at 700.degree. C. (for converting .alpha.-Si to poly-Si) can be reduced to a range of from 550.degree. C. to 650.degree. C. This improvement is accomplished by depositing a thin discontinuous film of a nucleating site forming material over an already deposited layer of .alpha.-Si. The .alpha.-Si film is then rapidly thermally annealed, with the nucleating site forming material enabling crystallization of the underlying .alpha.-Si at temperatures lower than theretofore reported.
Liu et al. also report in the '826 patent that .alpha.-Si can be selectively crystallized by depositing the nucleating site performing material in a pattern thereon and subsequently subjecting the patternized surface to an anneal procedure. Because the nucleating site forming material is a metal, the treated surface of the subsequently crystallized silicon is not optimal for structures. As a result, additional processing steps are required to allow untreated surfaces to become boundaries for devices to be grown.
In U.S. Pat. No. 5,275,826 of Fonash et al., a fabrication process for polycrystalline silicon thin film transistors is described that commences with a deposition of an ultra-thin nucleating-site forming layer onto the surface of an insulating substrate (e.g., 7059 glass, plastic). Next, an .alpha.-Si film is deposited thereover and the combined films are annealed at temperatures that do not exceed 600.degree. C. By patterning the deposition of the nucleating site forming material on the glass substrate, the subsequently deposited .alpha.-Si film can be selectively crystallized only in areas in contact with the nucleating-site forming material.
Ohtani et al. in U.S. Pat. Nos. 5,585,291, 5,612,250, 5,643,826, 5,543,352, and 5,654,203 describe a solution method for applying a catalyst metal to enhance subsequent .alpha.-Si crystallization.
The aforesaid prior art thus clearly indicates that catalysts can be used to reduce the time-temperature thermal budget needed for crystallization of semiconductor materials. For example, catalytic agents like palladium or nickel can be deposited by various techniques like vacuum evaporation or from solution and such catalytic agents can substantially impact the thermal budget. The crystallization time may be shortened to as low as 4 minutes at 550.degree. C. by such metal treatments.
Each of the above -cited references has employed some form of photolithographic masking to achieve selective deposition of the catalytic metal on selected parts of a substrate. Such procedures require a number of steps and add to the cost of the ultimate product made thereby.
Accordingly, it is an object of this invention to provide an improved method and apparatus for applying a crystallization catalyst onto an amorphous semiconductor film.